--- 1/draft-ietf-tsvwg-rlc-fec-scheme-08.txt 2018-09-19 06:13:08.046687334 -0700 +++ 2/draft-ietf-tsvwg-rlc-fec-scheme-09.txt 2018-09-19 06:13:08.118689040 -0700 @@ -1,19 +1,19 @@ TSVWG V. Roca Internet-Draft B. Teibi Intended status: Standards Track INRIA Expires: March 23, 2019 September 19, 2018 Sliding Window Random Linear Code (RLC) Forward Erasure Correction (FEC) Schemes for FECFRAME - draft-ietf-tsvwg-rlc-fec-scheme-08 + draft-ietf-tsvwg-rlc-fec-scheme-09 Abstract This document describes two fully-specified Forward Erasure Correction (FEC) Schemes for Sliding Window Random Linear Codes (RLC), one for RLC over the Galois Field (A.K.A. Finite Field) GF(2), a second one for RLC over the Galois Field GF(2^^8), each time with the possibility of controlling the code density. They can protect arbitrary media streams along the lines defined by FECFRAME extended to sliding window FEC codes, as defined in [fecframe-ext]. @@ -71,28 +71,28 @@ 3.1.1. Case of a CBR Real-Time Flow . . . . . . . . . . . . 8 3.1.2. Other Types of Real-Time Flow . . . . . . . . . . . . 10 3.1.3. Case of a Non Real-Time Flow . . . . . . . . . . . . 11 3.2. ADU, ADUI and Source Symbols Mappings . . . . . . . . . . 11 3.3. Encoding Window Management . . . . . . . . . . . . . . . 13 3.4. Pseudo-Random Number Generator (PRNG) . . . . . . . . . . 13 3.5. Coding Coefficients Generation Function . . . . . . . . . 15 3.6. Finite Fields Operations . . . . . . . . . . . . . . . . 17 3.6.1. Finite Field Definitions . . . . . . . . . . . . . . 17 3.6.2. Linear Combination of Source Symbols Computation . . 17 - 4. Sliding Window RLC FEC Scheme over GF(2^^8) for Arbitrary ADU - Flows . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 + 4. Sliding Window RLC FEC Scheme over GF(2^^8) for Arbitrary + Packet Flows . . . . . . . . . . . . . . . . . . . . . . . . 18 4.1. Formats and Codes . . . . . . . . . . . . . . . . . . . . 18 4.1.1. FEC Framework Configuration Information . . . . . . . 18 4.1.2. Explicit Source FEC Payload ID . . . . . . . . . . . 19 4.1.3. Repair FEC Payload ID . . . . . . . . . . . . . . . . 20 4.1.4. Additional Procedures . . . . . . . . . . . . . . . . 21 - 5. Sliding Window RLC FEC Scheme over GF(2) for Arbitrary ADU + 5. Sliding Window RLC FEC Scheme over GF(2) for Arbitrary Packet Flows . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 5.1. Formats and Codes . . . . . . . . . . . . . . . . . . . . 21 5.1.1. FEC Framework Configuration Information . . . . . . . 22 5.1.2. Explicit Source FEC Payload ID . . . . . . . . . . . 22 5.1.3. Repair FEC Payload ID . . . . . . . . . . . . . . . . 22 5.1.4. Additional Procedures . . . . . . . . . . . . . . . . 22 6. FEC Code Specification . . . . . . . . . . . . . . . . . . . 22 6.1. Encoding Side . . . . . . . . . . . . . . . . . . . . . . 22 6.2. Decoding Side . . . . . . . . . . . . . . . . . . . . . . 23 7. Implementation Status . . . . . . . . . . . . . . . . . . . . 24 @@ -305,21 +305,21 @@ This section introduces the procedures that are used by these FEC Schemes. 3.1. Possible Parameter Derivations The Sliding Window RLC FEC Scheme relies on several parameters: Maximum FEC-related latency budget, max_lat (in seconds) with real- time flows: a source ADU flow can have real-time constraints, and therefore - any FECFRAME related operation SHOULD take place within the + any FECFRAME related operation should take place within the validity period of each ADU (Appendix B describes an exception to this rule). When there are multiple flows with different real- time constraints, we consider the most stringent constraints (see [RFC6363], Section 10.2, item 6, for recommendations when several flows are globally protected). The maximum FEC-related latency budget, max_lat, accounts for all sources of latency added by FEC encoding (at a sender) and FEC decoding (at a receiver). Other sources of latency (e.g., added by network communications) are out of scope and must be considered separately (said differently, they have already been deducted from max_lat). max_lat can be regarded @@ -820,21 +820,22 @@ position i in each source is computed and stored in the corresponding byte of the repair symbol, where i belongs to {0; E-1}. In practice, the XOR sums will be computed several bytes at a time (e.g., on 64 bit words, or on arrays of 16 or more bytes when using SIMD CPU extensions). With both FEC Schemes, the details of how to optimize the computation of these linear combinations are of high practical importance but out of scope of this document. -4. Sliding Window RLC FEC Scheme over GF(2^^8) for Arbitrary ADU Flows +4. Sliding Window RLC FEC Scheme over GF(2^^8) for Arbitrary Packet + Flows This fully-specified FEC Scheme defines the Sliding Window Random Linear Codes (RLC) over GF(2^^8). 4.1. Formats and Codes 4.1.1. FEC Framework Configuration Information Following the guidelines of [RFC6363], section 5.6, this section provides the FEC Framework Configuration Information (or FFCI). This @@ -986,21 +987,21 @@ Figure 7: Repair FEC Payload ID Encoding Format 4.1.4. Additional Procedures The following procedure applies: o The ESI of source symbols MUST start with value 0 for the first source symbol and MUST be managed sequentially. Wrapping to zero happens after reaching the maximum 32-bit value. -5. Sliding Window RLC FEC Scheme over GF(2) for Arbitrary ADU Flows +5. Sliding Window RLC FEC Scheme over GF(2) for Arbitrary Packet Flows This fully-specified FEC Scheme defines the Sliding Window Random Linear Codes (RLC) over GF(2) (binary case). 5.1. Formats and Codes 5.1.1. FEC Framework Configuration Information 5.1.1.1. FEC Encoding ID o FEC Encoding ID: the value assigned to this fully specified FEC